/****************************************************   
;Copyright (.h) 2022    深圳市波领科技有限公司	*   
;					       							*   
;文件名称:    BL08P150.h                			*   
;文件标识:					    					*   
;摘    要:					    					*   
;**************************************************** 
;当前版本:		V1.00		 						*   
;作    者:			                    			*   
;完成日期:		2022-09-20              			*   
;****************************************************   
;【features】
;42-RISC-instruct
;ROM:		1K*14-ROM
;RAM:		64*BYTE-RAM
;TP0
;TC0
;COMPCON
;stack：	5-Level

/**************************************************************
//Special function register definitions
**************************************************************/
#ifndef __BL08P150_H
#define __BL08P150_H


//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
// BANK0~3 Special function register definitions
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$

// Register: INDF 
volatile unsigned char           INDF                @ 0x000;
// bit and bitfield definitions

// Register: PCL
volatile unsigned char           PCL                 @ 0x002;
// bit and bitfield definitions

// Register: STATUS
volatile unsigned char           STATUS              @ 0x003;
// bit and bitfield definitions
volatile bit CARRY               @ ((unsigned)&STATUS*8)+0;
volatile bit ZERO                @ ((unsigned)&STATUS*8)+2;
volatile bit nPD                 @ ((unsigned)&STATUS*8)+3;
volatile bit FnPD                @ ((unsigned)&STATUS*8)+3;
volatile bit nTO                 @ ((unsigned)&STATUS*8)+4;
volatile bit FnTO                @ ((unsigned)&STATUS*8)+4;
volatile bit IRP                 @ ((unsigned)&STATUS*8)+7;

volatile bit C	              @ ((unsigned)&STATUS*8)+0;
volatile bit DC               @ ((unsigned)&STATUS*8)+1;
volatile bit Z                @ ((unsigned)&STATUS*8)+2;
volatile bit NPD              @ ((unsigned)&STATUS*8)+3;
volatile bit NTO              @ ((unsigned)&STATUS*8)+4;
volatile bit RP0              @ ((unsigned)&STATUS*8)+5;
volatile bit RP1              @ ((unsigned)&STATUS*8)+6;
volatile bit RST              @ ((unsigned)&STATUS*8)+7;

volatile bit FC	                  @ ((unsigned)&STATUS*8)+0;
volatile bit FDC                  @ ((unsigned)&STATUS*8)+1;
volatile bit FZ                   @ ((unsigned)&STATUS*8)+2;
volatile bit FNPD                 @ ((unsigned)&STATUS*8)+3;
volatile bit FNTO                 @ ((unsigned)&STATUS*8)+4;
volatile bit FRP0                 @ ((unsigned)&STATUS*8)+5;
volatile bit FRP1                 @ ((unsigned)&STATUS*8)+6;
volatile bit FRST                 @ ((unsigned)&STATUS*8)+7;

// Register: FSR
volatile unsigned char           FSR                 @ 0x004;
// bit and bitfield definitions
volatile bit FSR_7                 @ ((unsigned)&FSR*8)+7;
volatile bit FFSR_7                 @ ((unsigned)&FSR*8)+7;

// Register: PCHBUF
volatile unsigned char           PCHBUF              @ 0x00A;
#define 	PCLATH 	PCHBUF 
// bit and bitfield definitions
volatile bit PCH0               @ ((unsigned)&PCHBUF*8)+0;
volatile bit PCH1               @ ((unsigned)&PCHBUF*8)+1;
volatile bit PCH2               @ ((unsigned)&PCHBUF*8)+2;

volatile bit FPCH0                 @ ((unsigned)&PCHBUF*8)+0;
volatile bit FPCH1                 @ ((unsigned)&PCHBUF*8)+1;
volatile bit FPCH2                 @ ((unsigned)&PCHBUF*8)+2;

// Register: INTEN
volatile unsigned char           INTEN               @ 0x00B;
// bit and bitfield definitions
volatile bit FPBIE                 @ ((unsigned)&INTEN*8)+1;
volatile bit FINTIE                @ ((unsigned)&INTEN*8)+2;
volatile bit FTC0IE                @ ((unsigned)&INTEN*8)+3;
volatile bit FTP0IE                @ ((unsigned)&INTEN*8)+4;
volatile bit FINT1IE               @ ((unsigned)&INTEN*8)+5;
volatile bit FGIE                  @ ((unsigned)&INTEN*8)+7;

volatile bit PBIE                 @ ((unsigned)&INTEN*8)+1;
volatile bit INTIE                @ ((unsigned)&INTEN*8)+2;
volatile bit TC0IE                @ ((unsigned)&INTEN*8)+3;
volatile bit TP0IE                @ ((unsigned)&INTEN*8)+4;
volatile bit INT1IE               @ ((unsigned)&INTEN*8)+5;
volatile bit GIE                  @ ((unsigned)&INTEN*8)+7;

// Register: INTFLAG1
volatile unsigned char           INTFLAG               @ 0x00C;
// bit and bitfield definitions
volatile bit FPBIF                 @ ((unsigned)&INTFLAG*8)+1;
volatile bit FINTIF                @ ((unsigned)&INTFLAG*8)+2;
volatile bit FTC0IF                @ ((unsigned)&INTFLAG*8)+3;
volatile bit FTP0IF                @ ((unsigned)&INTFLAG*8)+4;
volatile bit FINT1IF               @ ((unsigned)&INTFLAG*8)+5;

volatile bit PBIF                 @ ((unsigned)&INTFLAG*8)+1;
volatile bit INTIF                @ ((unsigned)&INTFLAG*8)+2;
volatile bit TC0IF                @ ((unsigned)&INTFLAG*8)+3;
volatile bit TP0IF                @ ((unsigned)&INTFLAG*8)+4;
volatile bit INT1IF               @ ((unsigned)&INTFLAG*8)+5;


//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
// BANK0 Special function register definitions
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$

// Register: PORTB
volatile unsigned char           PORTB            @ 0x006;
volatile unsigned char           RB               @ 0x006;
volatile unsigned char           PB               @ 0x006;
// bit and bitfield definitions
volatile bit FPB0                 @ ((unsigned)&PORTB*8)+0;
volatile bit FPB1                 @ ((unsigned)&PORTB*8)+1;
volatile bit FPB2                 @ ((unsigned)&PORTB*8)+2;
volatile bit FPB3                 @ ((unsigned)&PORTB*8)+3;
volatile bit FPB4                 @ ((unsigned)&PORTB*8)+4;
volatile bit FPB5                 @ ((unsigned)&PORTB*8)+5;

volatile bit PB0               @ ((unsigned)&PORTB*8)+0;
volatile bit PB1               @ ((unsigned)&PORTB*8)+1;
volatile bit PB2               @ ((unsigned)&PORTB*8)+2;
volatile bit PB3               @ ((unsigned)&PORTB*8)+3;
volatile bit PB4               @ ((unsigned)&PORTB*8)+4;
volatile bit PB5               @ ((unsigned)&PORTB*8)+5;

// Register: INTFLAG1
volatile unsigned char           INTFLAG1               @ 0x0D; 
// bit and bitfield definitions
volatile bit FCOMINTF               @ ((unsigned)&INTFLAG1*8)+1;
volatile bit COMINTF             @ ((unsigned)&INTFLAG1*8)+1;


// Register: PDCON
volatile unsigned char           PDCON               @ 0x00E;
// bit and bitfield definitions 
volatile bit PDB0             @ ((unsigned)&PDCON*8)+4;
volatile bit PDB1             @ ((unsigned)&PDCON*8)+5;
volatile bit PDB2             @ ((unsigned)&PDCON*8)+6;
volatile bit PDB3             @ ((unsigned)&PDCON*8)+7;
 
volatile bit FPDB0               @ ((unsigned)&PDCON*8)+4;
volatile bit FPDB1               @ ((unsigned)&PDCON*8)+5;
volatile bit FPDB2               @ ((unsigned)&PDCON*8)+6;
volatile bit FPDB3               @ ((unsigned)&PDCON*8)+7;


// Register: ODCON
volatile unsigned char           ODCON               @ 0x00F;
// bit and bitfield definitions
volatile bit ODB0             @ ((unsigned)&ODCON*8)+0;
volatile bit ODB1             @ ((unsigned)&ODCON*8)+1;
volatile bit ODB2             @ ((unsigned)&ODCON*8)+2;
volatile bit ODB3             @ ((unsigned)&ODCON*8)+3;
volatile bit ODB4             @ ((unsigned)&ODCON*8)+4;
volatile bit ODB5             @ ((unsigned)&ODCON*8)+5; 

volatile bit FODB0               @ ((unsigned)&ODCON*8)+0;
volatile bit FODB1               @ ((unsigned)&ODCON*8)+1;
volatile bit FODB2               @ ((unsigned)&ODCON*8)+2;
volatile bit FODB3               @ ((unsigned)&ODCON*8)+3;
volatile bit FODB4               @ ((unsigned)&ODCON*8)+4;
volatile bit FODB5               @ ((unsigned)&ODCON*8)+5; 

//**************************************************************

// Register: PHCON
volatile unsigned char           PHCON               @ 0x010;
// bit and bitfield definitions
volatile bit PHB0           @ ((unsigned)&PHCON*8)+0;
volatile bit PHB1           @ ((unsigned)&PHCON*8)+1;
volatile bit PHB2           @ ((unsigned)&PHCON*8)+2;
volatile bit PHB3           @ ((unsigned)&PHCON*8)+3;
volatile bit PHB4           @ ((unsigned)&PHCON*8)+4;
volatile bit PHB5           @ ((unsigned)&PHCON*8)+5; 

volatile bit FPHB0             @ ((unsigned)&PHCON*8)+0;
volatile bit FPHB1             @ ((unsigned)&PHCON*8)+1;
volatile bit FPHB2             @ ((unsigned)&PHCON*8)+2;
volatile bit FPHB3             @ ((unsigned)&PHCON*8)+3;
volatile bit FPHB4             @ ((unsigned)&PHCON*8)+4;
volatile bit FPHB5             @ ((unsigned)&PHCON*8)+5; 

// Register: TC0L
volatile unsigned char           TC0L               @ 0x011;
// bit and bitfield definitions

// Register: TC0M
volatile unsigned char           TC0M               @ 0x012;
// bit and bitfield definitions 
volatile bit FTCCKS              @ ((unsigned)&TC0M*8)+3;
volatile bit FTC0S0              @ ((unsigned)&TC0M*8)+4;
volatile bit FTC0S1              @ ((unsigned)&TC0M*8)+5;
volatile bit FTC0S2              @ ((unsigned)&TC0M*8)+6;
volatile bit FTC0TR              @ ((unsigned)&TC0M*8)+7;
 
volatile bit TCCKS              @ ((unsigned)&TC0M*8)+3;
volatile bit TC0S0              @ ((unsigned)&TC0M*8)+4;
volatile bit TC0S1              @ ((unsigned)&TC0M*8)+5;
volatile bit TC0S2              @ ((unsigned)&TC0M*8)+6;
volatile bit TC0TR              @ ((unsigned)&TC0M*8)+7;


//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
//BANK1
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$

//OPTION_REG
volatile unsigned char           OPTION_REG          @ 0x081; 
#define 	OPTION 	OPTION_REG
// bit and bitfield definitions
volatile bit FPS0                 @ ((unsigned)&OPTION_REG*8)+0;
volatile bit FPS1                 @ ((unsigned)&OPTION_REG*8)+1;
volatile bit FPS2                 @ ((unsigned)&OPTION_REG*8)+2; 
volatile bit FINTEDG              @ ((unsigned)&OPTION_REG*8)+6;
volatile bit FINTEDG1             @ ((unsigned)&OPTION_REG*8)+7;

volatile bit PS0               @ ((unsigned)&OPTION_REG*8)+0;
volatile bit PS1               @ ((unsigned)&OPTION_REG*8)+1;
volatile bit PS2               @ ((unsigned)&OPTION_REG*8)+2; 
volatile bit INTEDG            @ ((unsigned)&OPTION_REG*8)+6;
volatile bit INTEDG1           @ ((unsigned)&OPTION_REG*8)+7;
 
//TRISB	86H
volatile unsigned char           TRISB               @ 0x086; 
#define 	IOSTB	TRISB
// bit and bitfield definitions
volatile bit TRISB0             @ ((unsigned)&TRISB*8)+0;
volatile bit TRISB1             @ ((unsigned)&TRISB*8)+1;
volatile bit TRISB2             @ ((unsigned)&TRISB*8)+2;
volatile bit TRISB3             @ ((unsigned)&TRISB*8)+3;
volatile bit TRISB4             @ ((unsigned)&TRISB*8)+4;
volatile bit TRISB5             @ ((unsigned)&TRISB*8)+5; 

volatile bit FTRISB0               @ ((unsigned)&TRISB*8)+0;
volatile bit FTRISB1               @ ((unsigned)&TRISB*8)+1;
volatile bit FTRISB2               @ ((unsigned)&TRISB*8)+2;
volatile bit FTRISB3               @ ((unsigned)&TRISB*8)+3;
volatile bit FTRISB4               @ ((unsigned)&TRISB*8)+4;
volatile bit FTRISB5               @ ((unsigned)&TRISB*8)+5;  

//INTEN1 8DH
volatile unsigned char           INTEN1               @ 0x08D; 
// bit and bitfield definitions 
volatile bit FCOMINTEN               @ ((unsigned)&INTEN1*8)+1; 
volatile bit COMINTEN               @ ((unsigned)&INTEN1*8)+1; 

//PCON 8EH
volatile unsigned char           CHIPCON            @ 0x08E;
volatile unsigned char           PCON               @ 0x08E;
// bit and bitfield definitions
volatile bit FLVDTE                 @ ((unsigned)&PCON*8)+5;
volatile bit FLVREN                 @ ((unsigned)&PCON*8)+5;
volatile bit FEIS                   @ ((unsigned)&PCON*8)+6;
volatile bit FWDTE                  @ ((unsigned)&PCON*8)+7;

volatile bit LVDTE               @ ((unsigned)&PCON*8)+5;
volatile bit LVREN               @ ((unsigned)&PCON*8)+5;
volatile bit EIS                 @ ((unsigned)&PCON*8)+6;
volatile bit WDTE                @ ((unsigned)&PCON*8)+7;


//WUCON 8FH
volatile unsigned char           WUCON               @ 0x08F;
// bit and bitfield definitions
volatile bit FWUB0               @ ((unsigned)&WUCON*8)+0;
volatile bit FWUB1               @ ((unsigned)&WUCON*8)+1;
volatile bit FWUB2               @ ((unsigned)&WUCON*8)+2;
volatile bit FWUB3               @ ((unsigned)&WUCON*8)+3;
volatile bit FWUB4               @ ((unsigned)&WUCON*8)+4;
volatile bit FWUB5               @ ((unsigned)&WUCON*8)+5; 

volatile bit WUB0             @ ((unsigned)&WUCON*8)+0;
volatile bit WUB1             @ ((unsigned)&WUCON*8)+1;
volatile bit WUB2             @ ((unsigned)&WUCON*8)+2;
volatile bit WUB3             @ ((unsigned)&WUCON*8)+3;
volatile bit WUB4             @ ((unsigned)&WUCON*8)+4;
volatile bit WUB5             @ ((unsigned)&WUCON*8)+5; 

//**************************************************************
  
//PBIC0 91H
volatile unsigned char           PBIC0               @ 0x091;
// bit and bitfield definitions
 

//OSCM 94H
volatile unsigned char           OSCM               @ 0x094;
// bit and bitfield definitions
volatile bit FCLKMD               @ ((unsigned)&OSCM*8)+0;
volatile bit FSTPHX               @ ((unsigned)&OSCM*8)+1;
volatile bit FXTSEL               @ ((unsigned)&OSCM*8)+2;
volatile bit FSLCON               @ ((unsigned)&OSCM*8)+3;
volatile bit FSLT0CON             @ ((unsigned)&OSCM*8)+4;
volatile bit FGREENEN             @ ((unsigned)&OSCM*8)+5;
volatile bit FWAKEMODE            @ ((unsigned)&OSCM*8)+6;

volatile bit CLKMD               @ ((unsigned)&OSCM*8)+0;
volatile bit STPHX               @ ((unsigned)&OSCM*8)+1;
volatile bit XTSEL               @ ((unsigned)&OSCM*8)+2;
volatile bit SLCON               @ ((unsigned)&OSCM*8)+3;
volatile bit SLT0CON             @ ((unsigned)&OSCM*8)+4;
volatile bit GREENEN             @ ((unsigned)&OSCM*8)+5;
volatile bit WAKEMODE            @ ((unsigned)&OSCM*8)+6;

//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
//BANK2
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
 
//PWM0EN 111H
// Register: PWM0EN
volatile unsigned char           PWM0EN               @ 0x111;
// bit and bitfield definitions
volatile bit FLOADEN                 @ ((unsigned)&PWM0EN*8)+0;
volatile bit FPWM0XEN                @ ((unsigned)&PWM0EN*8)+1;
volatile bit FPWM01XEN               @ ((unsigned)&PWM0EN*8)+2;
volatile bit FPWM0M                  @ ((unsigned)&PWM0EN*8)+3;
volatile bit FPWM1XEN                @ ((unsigned)&PWM0EN*8)+4;
volatile bit FTP0SEL8                @ ((unsigned)&PWM0EN*8)+5;
volatile bit FTP0EN                  @ ((unsigned)&PWM0EN*8)+7;

volatile bit LOADEN               @ ((unsigned)&PWM0EN*8)+0;
volatile bit PWM0XEN              @ ((unsigned)&PWM0EN*8)+1;
volatile bit PWM01XEN             @ ((unsigned)&PWM0EN*8)+2;
volatile bit PWM0M                @ ((unsigned)&PWM0EN*8)+3;
volatile bit PWM1XEN              @ ((unsigned)&PWM0EN*8)+4;
volatile bit TP0SEL8              @ ((unsigned)&PWM0EN*8)+5;
volatile bit TP0EN                @ ((unsigned)&PWM0EN*8)+7;

// Register: PWM0C
volatile unsigned char           PWM0C               @ 0x112;
// bit and bitfield definitions
volatile bit CK0_0               @ ((unsigned)&PWM0C*8)+0;
volatile bit CK0_1               @ ((unsigned)&PWM0C*8)+1;
volatile bit PWMVS0              @ ((unsigned)&PWM0C*8)+2;
volatile bit PWMVS1              @ ((unsigned)&PWM0C*8)+3;
volatile bit PWMVS2              @ ((unsigned)&PWM0C*8)+4;
volatile bit CK0_2               @ ((unsigned)&PWM0C*8)+6;
volatile bit CK0_3               @ ((unsigned)&PWM0C*8)+7;

volatile bit FCK0_0               @ ((unsigned)&PWM0C*8)+0;
volatile bit FCK0_1               @ ((unsigned)&PWM0C*8)+1;
volatile bit FPWMVS0              @ ((unsigned)&PWM0C*8)+2;
volatile bit FPWMVS1              @ ((unsigned)&PWM0C*8)+3;
volatile bit FPWMVS2              @ ((unsigned)&PWM0C*8)+4;
volatile bit FCK0_2               @ ((unsigned)&PWM0C*8)+6;
volatile bit FCK0_3               @ ((unsigned)&PWM0C*8)+7;

// Register: PWM0TL
volatile unsigned char           PWM0TL               @ 0x113;
// bit and bitfield definitions

// Register: PWM0TH
volatile unsigned char           PWM0TH               @ 0x114;
// bit and bitfield definitions


// Register: PWM0PL
volatile unsigned char           PWM0PL               @ 0x115;
// bit and bitfield definitions

// Register: PWM0PH
volatile unsigned char           PWM0PH               @ 0x116;
// bit and bitfield definitions

// Register: PWM0DL
volatile unsigned char           PWM0DL               @ 0x117;
// bit and bitfield definitions

//**************************************************************
// Register: PWM0DH
volatile unsigned char           PWM0DH               @ 0x118;
// bit and bitfield definitions

// Register: PWM0DTL
volatile unsigned char           PWM0DTL              @ 0x119;
// bit and bitfield definitions

// Register: PWM0DTH
volatile unsigned char           PWM0DTH              @ 0x11A;
// bit and bitfield definitions

// Register: PWMPSCON
volatile unsigned char           PWMPSCON             @ 0x11B;
// bit and bitfield definitions
volatile bit PWM0S0             @ ((unsigned)&PWMPSCON*8)+0;
volatile bit PWM0S1             @ ((unsigned)&PWMPSCON*8)+1;
volatile bit PWM01S0            @ ((unsigned)&PWMPSCON*8)+2;
volatile bit PWM01S1            @ ((unsigned)&PWMPSCON*8)+3;
volatile bit PWM1S0             @ ((unsigned)&PWMPSCON*8)+4;
volatile bit PWM1S1             @ ((unsigned)&PWMPSCON*8)+5;

volatile bit FPWM0S0               @ ((unsigned)&PWMPSCON*8)+0;
volatile bit FPWM0S1               @ ((unsigned)&PWMPSCON*8)+1;
volatile bit FPWM01S0              @ ((unsigned)&PWMPSCON*8)+2;
volatile bit FPWM01S1              @ ((unsigned)&PWMPSCON*8)+3;
volatile bit FPWM1S0               @ ((unsigned)&PWMPSCON*8)+4;
volatile bit FPWM1S1               @ ((unsigned)&PWMPSCON*8)+5;

// Register: PWM1DL
volatile unsigned char           PWM1DL               @ 0x011C;
// bit and bitfield definitions

// Register: PWM1DH
volatile unsigned char           PWM1DH               @ 0x11D;
// bit and bitfield definitions

//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
//BANK3
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
 
// Register: CMPCON
volatile unsigned char           CMPCON               @ 0x19E;
// bit and bitfield definitions
volatile bit FCOPOL               @ ((unsigned)&CMPCON*8)+1;
volatile bit FCVEN                @ ((unsigned)&CMPCON*8)+2;
volatile bit FCPEN                @ ((unsigned)&CMPCON*8)+3;
volatile bit FCODEB               @ ((unsigned)&CMPCON*8)+4;
volatile bit FFTCKS               @ ((unsigned)&CMPCON*8)+5;
volatile bit FCMPIF               @ ((unsigned)&CMPCON*8)+6;
volatile bit FCMPEN               @ ((unsigned)&CMPCON*8)+7;

volatile bit COPOL               @ ((unsigned)&CMPCON*8)+1;
volatile bit CVEN                @ ((unsigned)&CMPCON*8)+2;
volatile bit CPEN                @ ((unsigned)&CMPCON*8)+3;
volatile bit CODEB               @ ((unsigned)&CMPCON*8)+4;
volatile bit FTCKS               @ ((unsigned)&CMPCON*8)+5;
volatile bit CMPIF               @ ((unsigned)&CMPCON*8)+6;
volatile bit CMPEN               @ ((unsigned)&CMPCON*8)+7;

// Register: CMPM
volatile unsigned char           CMPM               @ 0x19F;
// bit and bitfield definitions
volatile bit FVRS0                @ ((unsigned)&CMPM*8)+0;
volatile bit FVRS1                @ ((unsigned)&CMPM*8)+1;
volatile bit FVRS2                @ ((unsigned)&CMPM*8)+2;
volatile bit FVRS3                @ ((unsigned)&CMPM*8)+3;
volatile bit FXRVSEL              @ ((unsigned)&CMPM*8)+4;
volatile bit FCPINS0              @ ((unsigned)&CMPM*8)+5;
volatile bit FCPINS1              @ ((unsigned)&CMPM*8)+6;

volatile bit VRS0                @ ((unsigned)&CMPM*8)+0;
volatile bit VRS1                @ ((unsigned)&CMPM*8)+1;
volatile bit VRS2                @ ((unsigned)&CMPM*8)+2;
volatile bit VRS3                @ ((unsigned)&CMPM*8)+3;
volatile bit XRVSEL              @ ((unsigned)&CMPM*8)+4;
volatile bit CPINS0              @ ((unsigned)&CMPM*8)+5;
volatile bit CPINS1              @ ((unsigned)&CMPM*8)+6;



//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
//BANK END
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$





//******************************************************************
//仅供C嵌ASM
//指令转换预编译处理
/****嵌入单挑汇编****
	asm("NOP")
/****嵌入汇编模块****
	//C中嵌入ASM，指令操作 寄存器 前面需要加下划线“_”;
#asm
	CLRF	_INDF
	DECF	_FSR,F	
#endasm
*/
//******************************************************************
#define		BCR		BCF
#define		BSR		BSF

#define		BTRSC	BTFSC
#define		BTRSS	BTFSS

#define		NOP		asm("NOP");   
#define		CLRWDT	asm("clrwdt");    
#define		SLEEP	asm("sleep");

#define		CLRA	CLRW
#define		CLRR	CLRF

#define		MOVAR	MOVWF
#define		MOVR	MOVF

#define		DECR	DECF
#define		DECRSZ	DECFSZ

#define		INCR	INCF
#define		INCRSZ	INCFSZ

#define		ADDAR	ADDWF
#define		SUBAR	SUBWF

#define		ANDAR	ANDWF
#define		IORAR	IORWF

#define		XORAR	XORWF
#define		COMR	COMF

#define		RLR		RLF
#define		RRR		RRF

#define		SWAPR	SWAPF
#define		MOVIA	MOVLW

#define		ADDIA	ADDLW
#define		SUBIA	SUBLW

#define		ANDIA	ANDLW
#define		IORIA	IORLW

#define		XORIA	XORLW
#define		RETIA	RETLW

//******************************************************************

//#define	NOP()		asm("NOP")    
//#define	CLRWDT()	asm("clrwdt")    
//#define	SLEEP()		asm("sleep")    
//#define	DAA()		asm("DAA")    
//#define	DAS()		asm("DAS")    
//#define	INT()		asm("INT")    
//#define	CLRA()		asm("CLRA")    
//#define	ACC_0()		asm("MOVLW 0X00");	//ACC=0    
//#define	RETURN()	asm("RETURN");   
//




#endif

/*  
;*****************************************************   
;PIN-DEFINE   
;****************************************************    
;	    VDD -1		8 - VSS	                   *   
;	    PB5	-2		7 - PB0	                   *   
;	    PB4	-3		6 - PB1	                   *   
;	    PB3	-4		5 - PB2	                   *   
;****************************************************
*/
/*
// Register: PBIC1
volatile unsigned char           PBIC1               @ 0x06C;
// bit and bitfield definitions

// Register: PAIC1
volatile unsigned char           PAIC1               @ 0x06F;
// bit and bitfield definitions

// Register: EECON
volatile unsigned char           EECON1               @ 0x07A;
// bit and bitfield definitions

// Register: OPAM
volatile unsigned char           OPAM               @ 0x0DB; //0X5B
// bit and bitfield definitions
volatile bit MULTS0                @ ((unsigned)&OPAM*8)+0;
volatile bit MULTS1                @ ((unsigned)&OPAM*8)+1;
volatile bit OPAMEN                @ ((unsigned)&OPAM*8)+2;
volatile bit COMMS                 @ ((unsigned)&OPAM*8)+3;

#ifndef _LIB_BUILD
volatile union {
    struct {
        unsigned	MULTS0              : 1;
        unsigned	MULTS1              : 1;
        unsigned	OPAMEN              : 1;
        unsigned	COMMS               : 1; 
        unsigned	                    : 4;
    };
} OPAMbits @ 0x0DB;
#endif
*/
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$

/*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
变量定义 ：
bit				1	==布尔型位变量，0或1两种取值
char			8	==有符号或无符号字符变量，
unsigned char	8	==无符号字符变量
short			16	==有符号整型数
unsigned short	16	==无符号整型数
int				16	==有符号整型数
unsigned int	16	==无符号整型数
long			32	==有符号长整型
unsigned long	32	==无符号长整型
float			24	==浮点数
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BANK数据寄存器定义的管理
如果没有特别说明，所定义的变量降被定义在Bank0;除了Bank0内的变量声明不需要特殊处理外，
定义在其它Bank内的变量前面必须加上相应的bank序号，例如
	bank1 unsigned char buffer[2]	;变量定位在bank0
	bank2 bit flag1,flag2	;变量定位在bank2(如果硬件有bank2)
	bank3 int U16_tmp0,U16_tmp1	;变量定位在bank3(如果硬件有bank3)
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其它变量修饰关键词:
extern - 外部变量声明；如果在一个C程序文件中要使用一些变量但其原型定义写在另外的文件中，
	那么在本文件中必须将这些变量声明成“extern ”外部类型。

volatile —易变型变量声明。
const  —  常数型变量声明。
persistent —  非初始化变量声明。
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